1. Field of the Invention
The embodiments of the invention generally relate to field effect transistors (FETs) and, more specifically, to a FET structure formed on a semiconductor wafer (e.g., a silicon-on-insulator (SOI) wafer, a bulk silicon wafer, etc.) and a method of forming the FET structure on a semiconductor wafer without damaging the wafer surface.
2. Description of the Related Art
Conventional techniques for forming field effect transistor (FETs) on semiconductor wafers (e.g., a silicon-on-insulator (SOI) wafers, bulk silicon wafers, etc.) often result in damage to the wafer surface, particularly in the FET source/drain and source/drain extension regions. As devices are scaled in size, wafer surface damage can have an increasingly significant impact on device formation and, ultimately, on device performance. Therefore, there is a need in the art for an improved FET structure and a method of forming the FET structure without damaging the semiconductor wafer surface.